Texas Instruments TDEL3G510/-Q1 Triple Falling Edge Delay Elements
Texas Instruments TDEL3G510/-Q1 Triple Falling Edge Delay Elements contain three independent fixed-time delay blocks for digital timing applications. Each channel delays the falling edge of an input signal by a preset amount while allowing rising edges to pass through with minimal delay.
The TI TDEL3G510/-Q1 delivers preconfigured digital timing without external timing components, simplifying pulse shaping, signal debounce, and delay functions. The TDEL3G510/-Q1 Triple Falling Edge Delay Elements also use Schmitt-trigger inputs and I/O clamp diodes to support robust operation in systems exposed to overvoltage or undervoltage transients.
The delay elements are ideal for delaying falling-edge signals, extending short active-high pulses, filtering short active-low pulses, and debouncing active-high signals. The TDEL3G510/-Q1 is available in an 8-pin SOT-5X3 package and operates over a -40°C to +125°C temperature range.
Features
- Three independent fixed-time falling-edge delay blocks
- Falling-edge delay with minimal rising-edge delay
- Delay variation of 1% typical and 10% maximum
- Preconfigured digital timing with no external timing components required
- I/O clamp diodes for protection from overvoltage and undervoltage transients
- Schmitt-trigger architecture on all inputs
- Positive input clamp diode
Applications
- Delay the falling edge of a signal
- Extend a short active-high pulse
- Filter out short active-low pulses
- Debounce an active-high signal
Specifications
- Three channels
- Supply voltage range of 1.65V to 5.5V
- Supply current of 3µA
- Push-pull output type
- Maximum IOL of 12mA and maximum IOH of -12mA
- Operating temperature range of -40°C to +125°C
- Delay time of 100ms for TDEL1G51000 device information entry
- Package
- 8-pin DRL SOT-5X3 package
- Package size of 2.1mm x 1.6mm
Functional Block Diagram
Clamp Diode Structure
