Texas Instruments SN74AUP1G126 Low-Power Single Bus Buffer Gates

Texas Instruments SN74AUP1G126 Low-Power Single Bus Buffer Gates with 3-State output provides very low static and dynamic power consumption. The SN74AUP1G126 offers a wide operating range of 0.8V to 3.6V, resulting in increased battery life. The three-state output is disabled when the output-enable (OE) input is low. Additionally, the device has the input-disable feature, which allows floating input signals. Other features are a tpd range of 4.6ns maximum at 3.3V and ICC at 0.9µA maximum. The Texas Instruments SN74AUP1G126 uses Ioff circuitry for partial-power-down applications, which disables the outputs when the device is powered down. This feature prevents damage to the device by inhibiting current backflow into the device.

Features

  • Latch-up performance exceeds 100mA per JESD 78, Class II
  • ESD performance tested per JESD 22
    • 2000V human-body model (A114-B, Class II)
    • 1000V charged-device model (C101)
  • Available in the Texas Instruments NanoStar™ package
  • Low static-power consumption (ICC = 0.9µA maximum)
  • Low dynamic-power consumption (Cpd = 4pF typical at 3.3V)
  • The input-disable feature allows floating input conditions
  • Low input capacitance (Ci = 1.5pF typical)
  • Low noise – overshoot and undershoot < 10% of VCC
  • Ioff supports partial-power-down mode operation
  • Input hysteresis allows slow input transition and better switching noise immunity at the input
  • Wide operating VCC range of 0.8V to 3.6V
  • Optimized for 3.3V operation
  • 3.6V I/O tolerant to support mixed-mode signal operation
  • tpd = 4.6ns maximum at 3.3V
  • Suitable for point-to-point applications

Applications

  • Audio dock: Portable
  • BluRay™ players and home theaters
  • Personal Digital Assistant (PDA)
  • Power: Telecom/server AC/DC supply: single controller: analog and digital
  • Solid-State Drive (SSD): client and Enterprise
  • TV: LCD/digital and High-Definition (HDTV)
  • Tablet: Enterprise
  • Wireless headsets, keyboards, and mice

Circuit Diagram

Application Circuit Diagram - Texas Instruments SN74AUP1G126 Low-Power Single Bus Buffer Gates
發佈日期: 2018-04-26 | 更新日期: 2025-02-19