Texas Instruments LMK61PD0A2 Low Jitter Differential Oscillators

Texas Instruments LMK61PD0A2 Ultra Low-Jitter Differential Oscillators are a PLLatinum™ pin selectable oscillator that generates commonly used reference clocks. The device is pre-programmed in the factory to support seven unique reference clock frequencies that can be selected by pin-strapping each of FS[1:0] to VDD, GND, or NC (no connect). The output format is selected between LVPECL, LVDS, or HCSL by pin-strapping OS to VDD, GND, or NC. Internal power conditioning provides excellent power supply ripple rejection (PSRR), reducing the cost and complexity of the power delivery network. The device operates from a single 3.3V ± 5% supply.

Features

  • Ultra-low noise, high performance:
    • Jitter: 90fs RMS typical fOUT > 100MHz
    • PSRR: -70dBc, robust supply noise immunity
  • Flexible output frequency and format; user selectable
    • Frequencies: 62.5MHz, 100MHz, 106.25MHz, 125MHz, 156.25MHz, 212.5MHz, 312.5MHz
    • Formats: LVPECL, LVDS or HCSL
  • Total frequency tolerance of ± 50ppm
  • Internal memory stores multiple start-up configurations, selectable through pin control
  • 3.3V operating voltage
  • Industrial temperature range (-40ºC to +85ºC)
  • 7mm × 5mm 8-pin package

Applications

  • High-performance replacement for crystal-, SAW-, or silicon-based oscillators
  • Switches, routers, network line cards, Base Band Units (BBU), servers, storage/SAN
  • Test and measurement
  • Medical imaging
  • FPGA, processor attach

Functional Block Diagram

Block Diagram - Texas Instruments LMK61PD0A2 Low Jitter Differential Oscillators
發佈日期: 2016-02-15 | 更新日期: 2022-03-11