Renesas Electronics RC22112A FemtoClock™ Clock Generator
Renesas Electronics RC22112A FemtoClock™ Clock Generator is a fully integrated, low-power, high-performance clock generator. This generator features PCIe Gen 1-6 CC, SRIS, SRNS support, and less than 100fs-RMS low jitter. The RC22112A generator supports 1MHz I2C, 400kHz SMBus, or 50MHz SPI serial port, up to six fractional output dividers, and 12 integer output dividers. This clock generator provides reference clocks for high-speed serial links up to 28Gbps Ethernet in fabric cards in data center equipment. Typical applications include switches/routers, clock generation for 10Gbps/25Gbps/40Gbps/100Gbps/200Gbps/400Gbps Ethernet PHYs in switch fabric cards, medical imaging, and professional audio and video.Features
- Low power, less than 1.4W typical
- Low jitter, less than 100fs-RMS
- PCIe Gen 1-6 CC, SRIS, and SRNS support
- Up to six fractional output dividers and 12 integer output dividers
- Each fractional output divider is free-run and locked to APLL
- Each fractional output divider can be configured as NCO or DCO
- LVCMOS, LVPECL, LVDS, HCSL, CML, SSTL, and HSTL output modes supported with programmable output swing and common mode voltage
- One crystal/XO input
- Up to nine GPIO pins programmable to device select or system monitor options
- Supports 1MHz I2C, 400kHz SMBus, or 50MHz SPI serial port
- Internal non-volatile memory (up to 16 different configurations), or external serial I2C EEPROM provides default device settings on power-up
- 2.5V and 3.3V core and 1.8V, 2.5V, and 3.3V output operation
- -40° to 85°C industrial operation temperature range
Applications
- Switches/routers
- Clock generation for 10Gbps/25Gbps/40Gbps/100Gbps/200Gbps/400Gbps Ethernet PHYs in switch fabric cards
- Medical imaging
- Professional audio and video
Block Diagram
Application Diagram
Additional Resources
- Generating a TCS File using Frequency List Wizard in Timing Commander
- Recommended Crystal Oscillators for Network Synchronization
- ClockMatrix Time-to-Digital Converter (TDC)
- Aligning 1PPS Clocks in Larger Chassis Systems
- Methods for Changing DPLL Settings during a Reference Switch
- Mapping Clock Device Pins to Clock Numbers in the 8A34001
- Translating Non-Integer Frequencies
- ClockMatrix Firmware Update through Serial Port and EEPROM v1.0
- Delay Variation Measurement and Compensation
- Time Alignment Background in Wireless Infrastructure
- Time-of-Day Within an Ideal ChassisBased System
- Minimizing Backplane Signal Usage
- Input/Input-to-Output/Output Phase Adjustments
- ClockMatrix on nCXO Redundancy
- CLOCKMATRIXTM OVERVIEW
- ClockMatrix™ GUI Step-by-Step
發佈日期: 2023-05-02
| 更新日期: 2023-09-01
