Renesas Electronics 9ZXL0831E/51E Clock Buffers
Renesas Electronics 9ZXL0831E/51E Clock Buffers are the second-generation DB800ZL differential buffers with enhanced performance. The 9ZXL0831E/51E buffers are pin-compatible upgrades to the 9ZXL0831A and 9ZXL0851A while offering a much-improved phase jitter performance. These 9ZXL0831E/51E buffers are low-power 8-output differential buffers that meet all the performance requirements of the Intel DB800ZL derivative specification. The 9ZXL0831E buffers feature 8 Low-Power HCSL (LP-HCSL) output pairs, while the 9ZXL0851E buffers feature 8 Low-Power HCSL (LP-HCSL) output pairs with 85Ω Zout. These 9ZXL0831E/51E buffers are spread spectrum compatible and offer selectable Phase Locked Loop Bandwidth (PLL BW). Typical applications include servers, networking, storage, and SDDs.
Features
- LP-HCSL outputs eliminate 16 resistors and save 27mm2 of an area (0831E)
- LP-HCSL outputs with 85Ω Zout eliminate 32 resistors, save 64mm2 of area (0851E)
- Hardware control of each output 8 OE# pins
- Selectable PLL BW minimizes jitter peaking in cascaded PLL topologies
- Hardware/SMBus control of PLL bandwidth and bypass change mode without a power cycle
- Spread spectrum compatible with tracks spreading input clock for EMI reduction
- 100MHz and 133.33MHz PLL mode UPI and legacy QPI support
- Small board footprint 6mm x 6mm 48-VFQFPN package
- PCIe clocking architectures supported
- Common Clocked (CC)
- Independent Reference (IR) with and without spread spectrum
- Output
- 8 Low-Power (LP) HCSL output pairs (0831E)
- 8 Low-Power (LP) HCSL output pairs with 85Ω Zout (0851E)
Specifications
- Less than 50ps cycle-to-cycle jitter
- Less than 50ps output-to-output skew
- Input-to-output delay fixed at 0ps
- Less than 50ps input-to-output delay variation
- Less than 0.5ps rms phase jitter PCIe Gen4
- Phase jitter QPI/UPI > = 9.6GB/s < 0.2ps rms
- 1.0ps rms phase jitter IF-UPI
Applications
- Servers
- Storage
- Networking
- SSDs
Block Diagram
發佈日期: 2018-07-06
| 更新日期: 2023-01-25