OMAP-L132 C6-Integra™ DSP+ARM® Processor

Texas Instruments OMAP-L132 C6-Integra™ DSP+ARM® Processor is based on an ARM926EJ-S™ and C674x DSP core. This applications processor provides significantly lower power than other members of the TMS320C6000™ platform of DSPs (digital signal processors). OMAP-L132 is a fully integrated mixed processor solution with a dual-core architecture that provides benefits of both DSP and RISC technologies, incorporating a high-performance TMS320C674x DSP core and an ARM926EJ-S core. The ARM926EJ-S is a 32-bit RISC processor core that performs 32-bit or 16-bit instructions and processes 32-bit, 16-bit, or 8-bit data. The device DSP core uses a two-level cache-based architecture. The Level 1 program cache (L1P) is a 32KB direct mapped cache and the Level 1 data cache (L1D) is a 32KB 2-way set-associative cache. The Level 2 program cache (L2P) consists of a 256KB memory space that is shared between program and data space.