Mach-NX FPGAs

Lattice Semiconductor Mach-NX Field Programmable Gate Arrays are low-density FPGAs, including enhanced security features and on-chip dual boot flash comprised of SoC and FPGA partitions. The enhanced security features include Advanced Encryption Standard (AES) AES-128/256, Secure Hash Algorithm (SHA) SHA-256/384, Elliptic Curve Digital Signature Algorithm (ECDSA), Elliptic Curve Integrated Encryption Scheme (ECIES), Hash Message Authentication Code (HMAC) HMAC-SHA256/384, Public Key Cryptography, and Unique Secure ID.

結果: 4
選擇 圖像 零件編號 製造商 說明 規格書 供貨情況 定價 (HKD) 基於數量按單價篩選表中結果。 數量 RoHS ECAD模型 邏輯元件數目 內建記憶體 輸入/輸出數 電源電壓 - 最小值 電源電壓 - 最大值 最低工作溫度 最高工作溫度 安裝風格 封裝/外殼 封裝
Lattice FPGA - 現場可編程輯閘陣列 Lattice Mach-NX Secure Control FPGA Supporting 384-bit Cryptography 118庫存量
最少: 1
倍數: 1

8400 LE 0 bit 188 I/O 950 mV 1.05 V 0 C + 85 C SMD/SMT FCCSP-256 Tray
Lattice FPGA - 現場可編程輯閘陣列 Lattice Mach-NX Secure Control FPGA Supporting 384-bit Cryptography 59庫存量
最少: 1
倍數: 1

8400 LE 0 bit 378 I/O 950 mV 1.05 V 0 C + 85 C SMD/SMT FCBGA-484 Tray
Lattice FPGA - 現場可編程輯閘陣列 Lattice Mach-NX Secure Control FPGA Supporting 384-bit Cryptography 無庫存前置作業時間 14 週
最少: 119
倍數: 119

8400 LE 0 bit 188 I/O 950 mV 1.05 V - 40 C + 100 C SMD/SMT FCCSP-256 Tray
Lattice FPGA - 現場可編程輯閘陣列 Lattice Mach-NX Secure Control FPGA Supporting 384-bit Cryptography 無庫存前置作業時間 14 週
最少: 60
倍數: 60

8400 LE 0 bit 378 I/O 950 mV 1.05 V - 40 C + 100 C SMD/SMT FCBGA-484 Tray