LMX1205RHAT

Texas Instruments
595-LMX1205RHAT
LMX1205RHAT

製造商:

說明:
鎖相環 - PLL Low-noise high-freq uency buffer/multipl

壽命週期:
新產品:
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庫存量: 144

庫存:
144 可立即送貨
工廠前置作業時間:
18 週 工廠預計生產時間數量大於所顯示的數量。
最少: 1   多個: 1
單價:
HK$-.--
總價:
HK$-.--
估計關稅:
此產品免費航運

Pricing (HKD)

數量 單價
總價
HK$2,400.24 HK$2,400.24
HK$2,062.89 HK$20,628.90
HK$1,978.72 HK$49,468.00
完整捲(訂購多個250)
HK$1,841.36 HK$460,340.00

商品屬性 屬性值 選擇屬性
Texas Instruments
產品類型: 鎖相環 - PLL
RoHS:  
12.8 GHz
300 MHz
300 MHz to 12.8 GHz
2.6 V
2.4 V
Si
- 40 C
+ 85 C
SMD/SMT
VQFN-40
Reel
Cut Tape
品牌: Texas Instruments
開發套件: LMX1205EVM
輸入電平: CMOS
濕度敏感: Yes
運作供電電流: 1.13 A
工作電源電壓: 2.5 V
產品類型: PLLs - Phase Locked Loops
系列: LMX1205
原廠包裝數量: 250
子類別: Wireless & RF Integrated Circuits
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所選屬性: 0

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CNHTS:
8542399000
USHTS:
8542390090
TARIC:
8542399000
MXHTS:
8542399999
ECCN:
EAR99

LMX1205 JESD Buffer/Multiplier/Divider

Texas Instruments LMX1205 JESD Buffer/Multiplier/Divider has a high-frequency capability, extremely low jitter, and programmable clock input and output delay. These features make this device a great approach to clock high precision, high-frequency data converters without degradation of signal-to-noise ratio. Each of the four high-frequency clock outputs and additional LOGICLK outputs with a larger divider range is paired with a SYSREF output clock signal. The SYSREF signal for JESD204B/C interfaces can either be passed or internally generated as input and re-clocked to the device clocks. The noiseless delay adjustment at the input path of the high-frequency clock input and individual clock output paths ensures low-skew clocks in a multi-channel system. For the data converter clocking application, having the jitter of the clock less than the aperture jitter of the data converter is essential. In applications where more than four data converters need to be clocked, various cascading architectures can be developed using multiple devices to distribute all the SYSREF signals and high-frequency clocks required. The Texas Instruments LMX1205 is an exemplary choice for clocking data converters when combined with an ultra-low noise reference clock source, especially when sampling above 3GHz.